Erscheinungsdatum: 08/2007, Medium: Buch, Einband: Gebunden, Titel: SAT-Based Scalable Formal Verification Solutions, Autor: Ganai, Malay // Gupta, Aarti, Verlag: Springer-Verlag GmbH // Springer US, Sprache: Englisch, Schlagworte: EDV // Theorie // Software-Entw // Software Engineering // Elektrotechnik // Bauelement // elektronisch // Baustein // Elektronik // Bauelemente // Schaltung // Grundschaltung // Standardschaltung // CAD // Computer Aided Design // Informatik // Datenverarbeitung // Anwendungen // Betrieb // Verwaltung // CAM // Computer Aided Manufacturing // Computer-Aided Design // Unternehmensanwendungen // Computerunterstützte Fertigung, Rubrik: Anwendungs-Software, Seiten: 330, Reihe: Series on Integrated Circuits and Systems, Informationen: Gb, Gewicht: 719 gr, Verkäufer: averdo
SAT-Based Scalable Formal Verification Solutions ab 176.49 € als Taschenbuch: Softcover reprint of hardcover 1st ed. 2007. Aus dem Bereich: Bücher, English, International, Gebundene Ausgaben,
The verification of systems to guarantee their correct behavior is discussed in this book. The mainly applied algorithmic method is the model checking technique combined with algorithms for solving the satisfiability problem (short: SAT). SAT-based verification of discrete systems has become one of the most effective technique within the last 10 years, such that industrial as well as academic applications heavily rely on it. The book covers the whole range of a SAT-based tool application. We propose extensions and concepts that concentrate on the core of a SAT-solver. However, these proposals are then transferred to novel verification models. Moreover, we describe approaches that incorporate the structure of the problem to exploit knowledge gained during the verification process on the level of the SAT-solver. The main focus of the book is on the verification of incomplete system designs, which occur for example in the early phase of a design. We describe various SAT-based modeling concepts that vary regarding their expressiveness and computational resources. The proposed methods are evaluated experimentally to guarantee their applicability in practice.
This dissertation focuses on two subjects in formal verification. The first subject is the development of methods and tools for the formal verification of compilers. We offer the Translation Validation approach, according to which the translation of the compiler is validated after each run. The evidence from applying translation validation to two compilers proves that this approach has some strong advantages over the more traditional formal verification of the compiler itself. The research includes several new techniques for handling industrial-size programs, among them a new decision procedure for equality logic. The second subject is the development of various optimizations to SAT algorithms, which exploit the unique structure of formulas originating from Bounded Model Checking of invariance properties. The dissertation is organized in the form of an edited collection of five published articles, and an overview in the beginning.